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Seohee Jung
Dept. of Electrical and Computer Engineering, Seoul National University
Ph.D., 2024 ~ Present
Contact Info.
Email : seoheejung@snu.ac.kr
Education
2022 - 2024
M.S. in Electrical Engineering
Korea Advanced Institute of Science and Technology
2018 - 2022
B.S. in Electrical Engineering
Korea Advanced Institute of Science and Technology
Publications
S. Lee=, S. Jung=, S. Kwak, S. Lee, H. Lee, and J. Choi*, "An 85.5-to-94.5-GHz W-Band Fully-Symmetric Quadrature LO Generator with a Fast Quadrature Calibration Technique, Achieving Closely Matched 61-fs RMS Jitter and 41-dB IRR," IEEE RFIC Symposium, Accepted. (= Equally-Credited Authors)
J. Kim, J. Bang, S. Jung, M. Han, and J. Choi*, "A Low-Reference-Spur and Low-Jitter D-Band PLL with Complementary Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector," IEEE Solid-State Circuits Letters (SSC-L), Aug. 2025, invited from IEEE 2024 Asian Solid-State Circuits Conference (ASSCC).
S. Jung, J. Kim, J. Bang, S. Lee, H. Yoon*, and J. Choi*, "A Low-Jitter and Wide-Frequency-Range D-Band Frequency Synthesizer with a Subsampling PLL and a Harmonic Boosting Frequency Multiplier," IEEE J. Solid-State Circuits (JSSC), May 2025, invited from IEEE 2024 RFIC Symposium.
J. Kim=, J. Bang=, S. Jung, M. Han and J. Choi*, "A –51dBc-Reference-Spur and 66fsrms-Jitter D-Band PLL with Complementary Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector," IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2024. (= Equally-Credited Authors)
S. Jung, J. Kim, J. Bang, and J. Choi*, "A 45-fsrms-Jitter, 144-to-162-GHz D-Band Frequency Synthesizer Using a Subsampling PLL and a Harmonic-Boosting Frequency Multiplier," IEEE RFIC Symposium, June 2024.
J. Bang, S. Jung, J. Kim, S. Park, and J. Choi*, "A Sub-50-fs RMS jitter, 103.5-GHz Fundamental-Sampling PLL with an Extended Loop Bandwidth," IEEE Solid-State Circuits Letters (SSC-L), Aug. 2023, invited from IEEE 2023 International Solid-State Circuits Conference (ISSCC).
J. Bang, J. Kim, S. Jung, S. Park, and J. Choi*, "A 47fsrms-Jitter and 26.6mW 103.5GHz PLL with Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector and Extended Loop Bandwidth," IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2023.
Awards and Honors
27th Korea Semiconductor Design Competition, Minister Award (3rd place), Oct. 2026.
24th Korea Semiconductor Design Competition, Minister Award (3rd place), Nov. 2023.
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